MC74HCT574A |
RFQ for MC74HCT574A Required Field |
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| Technical/Catalog Information | MC74HCT574ADWR2 |
| Vendor | ON Semiconductor |
| Category | Integrated Circuits (ICs) |
| Mounting Type | Surface Mount |
| Package / Case | 20-SOIC (7.5mm Width) |
| Function | Standard |
| Number of Bits per Element | 8 |
| Number of Elements | 1 - Single |
| Current - Output High, Low | 6mA, 6mA |
| Output Type | Tri-State Non Inverted |
| Trigger Type | Positive Edge |
| Type | D-Type Bus |
| Packaging | Tape & Reel (TR) |
| Operating Temperature | -55°C ~ 125°C |
| Delay Time - Propagation | 30ns |
| Frequency - Clock | 30MHz |
| Voltage - Supply | 4.5 V ~ 5.5 V |
| Drawing Number | * |
| Lead Free Status | Contains Lead |
| RoHS Status | RoHS Non-Compliant |
| Other Names | MC74HCT574ADWR2 MC74HCT574ADWR2 MC74HCT574ADWOSTR ND MC74HCT574ADWOSTRND MC74HCT574ADWOSTR |
| Product | Manufacturers | Pack | D/C |
| MC74HCT574A | - | SOP20 | 00+ |
The MC74HCT574A is identical in pinout to the LS574. This device may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
Data meeting the setup time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does not affect the states of the flipflops, but when Output Enable is high, all device outputs are forced to the highimpedance state. Thus, data may be stored even when the outputs are not enabled.
The HCT574A is identical in function to the HCT374A but has the flipflop inputs on the opposite side of the package from the outputs to facilitate PC board layout.
Features |
| • Output Drive Capability: 15 LSTTL Loads• TTL NMOS Compatible Input Levels• Outputs Directly Interface to CMOS, NMOS and TTL• Operating Voltage Range: 4.5 to 5.5 V• Low Input Current: 1.0 mA• In Compliance with the Requirements Defined by JEDEC Standard No. 7A• Chip Complexity: 286 FETs or 71.5 Equivalent Gates |
| Symbol | Parameter | Value | Unit |
| vcc | DC Supply Voltage (Referenced to GND) | 0.5 to +7.0 | V |
| VIN | DC Input Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
| VOUT | DC Output Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
| LIN | DC Input Current, per Pin | ±20 | mA |
| IOUT | DC Onput Current, per Pin | ±35 | mA |
| ICC | DC Supply Current Per Supply Pin | ±75 | mA |
| PD | Power dissipation in still air piastic DIP SOIC package |
750 500 |
mW |
| TSTG | Storage Temperature | 65 to +150 | °C |
| TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 | °C |
